Abstract

In this paper, through-silicon via (TSV) circuit models for the third generation of high bandwidth memory (HBM3) are developed utilizing 3D IC stacking technology with micro-bump or hybrid bonding. A good agreement between the results of the equivalent model and the full-wave simulation would be seen. In addition, the power, performance, and area (PPA) metrics of both stacking techniques are analyzed and compared. In all aspects, the hybrid bonding technique is more effective.