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Trending Papers in emerging technologies

Trending
Today
32
Describing a cashless mobile payment system based on Bluetooth
  • Bluetooth technology allows Peer-to-Peer transactions.
13
The development of a portable MRI device
From Paper: Assessment of Brain Injury Using Portable, Low-Field Magnetic Resonance Imaging at the Bedside of Critically Ill Patients
Authors:
Sheth, Kevin N., et al
Published: Sep 2020
  • Importantly, there were no adverse events or complications during deployment of the portable MRI or scanning in an intensive care unit room
  • These findings demonstrate the potential role of portable MRI to obtain neuroimaging in complex clinical care settings
6
Wearable devices that detect physiological data can be used to help detect if someone has a SARS-CoV-2 infection
From Paper: Assessment of physiological signs associated with COVID-19 measured using wearable devices
Author:
Conor Heneghan
Respiration rate, heart rate, and heart rate variability are some health metrics that are easily measured by consumer devices and which can potentially provide early signs of illness. Furthermore, mobile applications which accompany wearable devices can be used to collect relevant self-reported symptoms and demographic data. This makes consumer devices a valuable tool in the fight against the COVID-19 pandemic. We considered two approaches to assessing COVID-19 - a symptom-based approach, and a physiological signs based technique. Firstly, we trained a Logistic Regression classifier to predict the need for hospitalization of COVID-19 patients given the symptoms experienced, age, sex, and BMI. Secondly, we trained a neural network classifier to predict whether a person is sick on any specific day given respiration rate, heart rate, and heart rate variability data for that day and and for the four preceding days. Data on 1,181 subjects diagnosed with COVID-19 (active infection, PCR test) were collected from May 21 - July 14, 2020. 11.0% of COVID-19 subjects were asymptomatic, 47.2% of subjects recovered at home by themselves, 33.2% recovered at home with the help of someone else, 8.16% of subjects required hospitalization without ventilation support, and 0.448% required ventilation. Fever was present in 54.8% of subjects. Based on self-reported symptoms alone, we obtained an AUC of 0.77 +/- 0.05 for the prediction of the need for hospitalization. Based on physiological signs, we obtained an AUC of 0.77 +/- 0.03 for the prediction of illness on a specific day with 4 previous days of history. Respiration rate and heart rate are typically elevated by illness, while heart rate variability is decreased. Measuring these metrics can help in early diagnosis, and in monitoring the progress of the disease.
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Impact of Integrated Circuit Packaging on Synaptic Dynamics of Memristive Devices
Authors:
Aidana Irmanova, Grant A. Ellis, Alex Pappachen James
Published: Sep 2018
The memristor can be used as non volatile memory (NVM) and for emulatingneuron behavior. It has the ability to switch between low resistance $R_{on}$and high resistance values $R_{off}$, and exhibit the synaptic dynamicbehaviour such as potentiation and depression. This paper presents a study onpotentiation and depression of memristors in Quad Flat Pack. A comparison isdrawn between the memristors with and without the impact of parasitics ofpackaging, using measured data and equivalent circuit models. The parameters inmemristor and packaging models for the SPICE simulations were determined usingmeasured data to reflect the memristor parasitics in Quad Flat Packs.
Retrieved from arxiv
0
Molecular Communications: Channel Model and Physical Layer Techniques
Authors:
Guo, Weisi, et al
Published: Jul 2015
This article examines recent research in molecular communications from atelecommunications system design perspective. In particular, it focuses onchannel models and state-of-the-art physical layer techniques. The goal is toprovide a foundation for higher layer research and motivation for research anddevelopment of functional prototypes. In the first part of the article, wefocus on the channel and noise model, comparing molecular and radio-wavepathloss formulae. In the second part, the article examines, equipped with theappropriate channel knowledge, the design of appropriate modulation and errorcorrection coding schemes. The third reviews transmitter and receiver sidesignal processing methods that suppress inter-symbol-interference. Takentogether, the three parts present a series of physical layer techniques thatare necessary to producing reliable and practical molecular communications.
Retrieved from arxiv
0
Optimizing Teleportation Cost in Distributed Quantum Circuits
Authors:
Mariam Zomorodi-Moghadam, Monireh Houshmand, Mahboobeh Houshmand
Published: May 2016
The presented work provides a procedure for optimizing the communication costof a distributed quantum circuit (DQC) in terms of the number of qubitteleportations. Because of technology limitations which do not allow largequantum computers to work as a single processing element, distributed quantumcomputation is an appropriate solution to overcome this difficulty. Previousstudies have applied ad-hoc solutions to distribute a quantum system forspecial cases and applications. In this study, a general approach is proposedto optimize the number of teleportations for a DQC consisting of two spatiallyseparated and long-distance quantum subsystems. To this end, differentconfigurations of locations for executing gates whose qubits are in distinctsubsystems are considered and for each of these configurations, the proposedalgorithm is run to find the minimum number of required teleportations.Finally, the configuration which leads to the minimum number of teleportationsis reported. The proposed method can be used as an automated procedure to findthe configuration with the optimal communication cost for the DQC.
0
Exact Synthesis of Reversible Logic Circuits using Model Checking
Authors:
Rajarshi Ray, Arup Deka, Kamalika Datta
Published: Feb 2017
Synthesis of reversible logic circuits has gained great atten- tion duringthe last decade. Various synthesis techniques have been pro- posed, somegenerate optimal solutions (in gate count) and are termed as exact, whileothers are scalable in the sense that they can handle larger functions butgenerate sub-optimal solutions. Although scalable synthe- sis is very muchessential for circuit design, exact synthesis is also of great importance as ithelps in building design library for the synthesis of larger functions. In thispaper, we propose an exact synthesis technique for re- versible circuits usingmodel checking. We frame the synthesis problem as a model checking instance andpropose an iterative bounded model checking calls for an optimal synthesis.Experiments on reversible logic benchmarks shows successful synthesis ofoptimal circuits. We also illus- trate optimal synthesis of random functionswith as many as 10 variables and up to 10 gates.
Retrieved from arxiv
0
Neuromorphic computing with nanoscale spintronic oscillators
Authors:
Torrejon, Jacob, et al
Published: Jan 2017
Neurons in the brain behave as non-linear oscillators, which develop rhythmicactivity and interact to process information. Taking inspiration from thisbehavior to realize high density, low power neuromorphic computing will requirehuge numbers of nanoscale non-linear oscillators. Indeed, a simple estimationindicates that, in order to fit a hundred million oscillators organized in atwo-dimensional array inside a chip the size of a thumb, their lateraldimensions must be smaller than one micrometer. However, despite multipletheoretical proposals, there is no proof of concept today of neuromorphiccomputing with nano-oscillators. Indeed, nanoscale devices tend to be noisy andto lack the stability required to process data in a reliable way. Here, we showexperimentally that a nanoscale spintronic oscillator can achieve spoken digitrecognition with accuracies similar to state of the art neural networks. Wepinpoint the regime of magnetization dynamics leading to highest performance.These results, combined with the exceptional ability of these spintronicoscillators to interact together, their long lifetime, and low energyconsumption, open the path to fast, parallel, on-chip computation based onnetworks of oscillators.
Retrieved from arxiv
0
Memristive integrative sensors for neuronal activity
Authors:
Gupta, Isha, et al
Published: Jul 2015
The advent of advanced neuronal interfaces offers great promise for linkingbrain functions to electronics. A major bottleneck in achieving this isreal-time processing of big data that imposes excessive requirements onbandwidth, energy and computation capacity; limiting the overall number ofbio-electronic links. Here, we present a novel monitoring system concept thatexploits the intrinsic properties of memristors for processing neuralinformation in real time. We demonstrate that the inherent voltage thresholdsof solid-state TiOx memristors can be useful for discriminating significantneural activity, i.e. spiking events, from noise. When compared with amulti-dimensional, principal component feature space threshold detector, oursystem is capable of recording the majority of significant events, withoutresorting to computationally heavy off-line processing. We also show amemristive integrating sensing array that discriminates neuronal activityrecorded in-vitro. We prove that information on spiking event amplitude issimultaneously transduced and stored as non-volatile resistive statetransitions, allowing for more efficient data compression, demonstrating thememristors' potential for building scalable, yet energy efficient on-nodeprocessors for big data.
Retrieved from arxiv
0
A Resistive CAM Processing-in-Storage Architecture for DNA Sequence Alignment
Authors:
Roman Kaplan, Leonid Yavits, Ran Ginosar, Uri Weiser
Published: Jan 2017
A novel processing-in-storage (PRinS) architecture based on Resistive CAM(ReCAM) is described and proposed for Smith-Waterman (S-W) sequence alignment.The ReCAM massively-parallel compare operation finds matching base-pairs in afixed number of cycles, regardless of sequence length. The ReCAM PRinS S-Walgorithm is simulated and compared to FPGA, Xeon Phi and GPU-basedimplementations, showing at least 4.7x higher throughput and at least 15x lowerpower dissipation.
Retrieved from arxiv
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